Trenz Electronic GmbH
S7 Mini - Fully Open-Source Module with AMD Spartan 7S25-1C, 64 Mbit HyperRAM (TE0890-02-P1C-5-A)
Fully Open-Source Spartan 7 Module, 64 MBit Config PROM for dual-boot and/or SW code storage, 64 MBit HyperRAM DRAM, 5V supply input
Numero di variazione (MEPA): VAR-827003091
Codice produttore: TE0890-02-P1C-5-A
Codice doganale:
Articolo situato in e spedito da: Riedlingen, Germania
The predecessor of this article is TE0890-01-P1C-5-A. All changes are in the Product Change Notification (PCN).
The Trenz Electronic TE0890-02-P1C-5-A is a FPGA module integrating a AMD Spartan™ 7, 64 Mbit HyperRAM DRAM (may be used as video frame buffer), 64 Mbit Config PROM for dual-boot and/or SW code storage and dual-pinout DIP-40 or 50mil 80 pin connectors for 32 or 64 FPGA 3.3V I/Os
The module is footprint compatible with 7S6, 7S15, 7S50 FTGB-196 devices.
This reference design is bundled with a FREE evaluation edition of the low-cost, commercially proven, high performance memory controller IP supplied by Synaptic Laboratories Ltd (SLL). This free IP evaluation license never expires, and no customer registration or NIC ID is required.
Click here to find the latest free trials of SLL’s memory controller IP for HyperBus, OctaBus, Xccela Bus, JEDEC xSPI Profile 1.0 and JEDEC xSPI Profile 2.0 for Intel, Microchip, and AMD/Xilinx FPGA. SLL IP is also qualified for use with Trenz Electronic HS CRUVI enabled boards. Please send all sales enquiry and technical support questions for SLL’s IP to info@synaptic-labs.com.
All parts are at least commercial temperature range of 0°C to +70°C. The module operating temperature range depends on customer design and cooling solution. Please contact us for options.
Key Features
- AMD Spartan™ 7 XC7S25-1FTGB196C FPGA
- Dimensions: 2.7 x 5.2 cm
- Fully Open-Source Spartan™ 7 Module
- 7S25 target with 23K logic cells, 29K flops, 45 36Kb BRAMs, 80 mults.
- Footprint compatible with 7S6, 7S15, 7S50 FTGB-196 devices
- Devices fully supported by free "Web Pack" Vivado for Synthesis, Place + Route
- Dual-pinout DIP-40 or 50mil 80 pin connectors for 32 or 64 FPGA 3.3V I/Os
- 64 Mbit Config PROM for dual-boot and/or SW code storage
- 64 Mbit HyperRAM DRAM (may be used as video frame buffer)
- Standard 1x6 FTDI cable serial interface to Host-PCs
- Standard 1x6 Digilent HS2 JTAG header for initial PROM programming
- 5V supply input (4.0V-5.5V per PAM2305 spec)
Other assembly options for cost or performance optimization plus high volume prices available on request.
Recommended Software
Vivado ML Standard Edition (free version)
The Vivado ML Standard Edition is the FREE version of the Vivado design suite. Vivado ML Standard delivers instant access to some basic Vivado features and functionality at no cost.
Overview of all editions of Vivado MLDevelopment Support
Latest documentation, design support files and reference designs with source files are available for download free of charge.
Scope of Delivery
- 1 x TE0890-02-P1C-5-A Trenz Electronic FPGA module with AMD Spartan™ 7
Additional Information
- Manufacturer's article number: TE0890-02-P1C-5-A
- Trenz Electronic TE0890 Wiki
- Support Forum
All modules produced by Trenz Electronic are developed and manufactured in Germany.
The online pictures of this product are not a legally binding offer, but are symbol pictures for illustration and presentation only.
| ID articolo | 102639 |
| Condizione | |
| ID della variazione | 3917 |
| Modello | TE0890-02-P1C-5-A |
| Produttore | Trenz Electronic GmbH |
| Paese di produzione | |
| Contenuto | 1 undefined |
| Peso | 35 g |
| Peso netto | 35 g |
